ENE’s Keyboard Controller series is a highly integrated embedded controller (EC) for laptop platform. It appeals for low power consumption and best-in-class performance to satisfy customers’ demand.
The system support functions include 8051 MCU, LPC interface, PS/2 interface, Keyboard matrix encoder, PWM, A/D converter, D/A converter, Fan controller, SMBus interface, GPIO, PECI, one wire master, SPI and ENE Serial Bus.
Power for EC
When Ec Provided by the power it active the analogue and digital power
Clock On Clock
By default, it generates the clock on clock pins (32.768 kHz). If Susclk is used then it provided by intel chipset by rtc section activity and it is in Square waves.
EC Reset or POR#
When Clock is on Clock then Ec reset is take place. This delay must take place after clock generation. That is because a use of RC circuit used on ECRST#.After ECRST# EC output clock on EC Bios pin no.6 that is usually 12mhz to 30mhz, you can check it by removing bios chip and then check pin6 for clock with DSO and click the power button. This is the signal which makes bios active to input and output data and time selection for chip select signal to read write operations.
When bios is mounted 3.3v must be there on pin8, pin7and pin3
Pin 8 is for VCC power for bios chip. Pin 7 for hold for pause operations when using low buffer area. Pin 3 is for write protection for the device.When clock present on pin6. EC control CS# signal for Data input and output operations.When CS# is High chip is not select for Data input and output when CS# is in low then EC Input and output made. Ec input data for certain address to read from pin5 and output Will make from pin2. Data is generally used in 8 bit.
When System Driven by adaptor this signal should pe high it recognise the adaptor ok condition to run the system. It should have 3.3v on this signal.
RSMRST# or Resume Reset
This signal must be low or 0v. This signal used to resume suspended power plan logic. It holds the logic until power button not pressed. This is the third reset for the system.
After successful bios data read this signal should be high on 3.3v. it enables for 3valw and 5valw always standby supply.
This is on/off logic signal of system restart. It releases the hold of power plans and resumes reset occurred.
LID Switch or LID_SW#
This is standby enable signal if this enables (0v). Then internal logic enables sleep or standby signal. So system always in stand by when this signal is enabled. It should be de-asserted (3.3v on it) when press power button.
Battery data and clock
This is smbus communication lines which read battery status and charging ic working condition. It should have high logic (3.3v).